Itanium : Computer Hardware Buyers’ Glossary

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Itanium
Intel’s new line of 64-bit CISC (Complex Instruction Set Computer) CPU (Central Processing Unit) chips, formerly known as Merced. There are future chips coded named Deerfield and Madison. It is too costly at present for home machines. It is used mainly for servers — machines that service multiple requests from a LAN (Local Area Network) or from the Internet. IBM (International Business Machines) has a 64-bit version of Java that exploits its huge address space on Win2K. It has a 10-stage pipeline and 128 integer and 128 floating point registers. Instructions are 41 bits, packed 3 together into 128-bit bundles, with a 5-bit template that encodes the instruction types in each slot. It is a CISC design, though quite different from the Pentium. The instruction formats are quite complex, but not quite as complex as the Pentium. It has many instructions for bit fiddling and interleaving. It has instructions for the compiler to give it performance hints. Register instructions typically use two operands and a destination. There are a number of parallel instructions that do two sets of operands at once. It can also run Pentium 32-bit code. It gives the programmer considerable control over the pipelines. There is ECC (Error Correcting Code) on the various busses. It is probably the most complicated CPU I have yet encountered. You can get the manuals and datasheets from Intel. The chip is not particularly well-suited to Java, since it has no 32-bit operations, required to support integer arithmetic and the Java stack. Everything is 64-bit. For Java to work well on it, you would need to convert your ints to longs. The Itanium II (code named McKinley) 1 GHz processor retails for $4226.00 USD Clearly these are not yet for the home market. Customers must need the huge 64 bit address spaces to justify such prices.

HP (Hewlett Packard) makes a 64-bit JDK for the Itanium and HP-UX.

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