CPUs try to get around these speed impedance mismatch by using layers of caches to avoid having to go to RAM for data. They also use lookahead to try to get fetch data from RAM long before it it needed. They also use dual cores, so that one CPU can continue operating while the other is waiting on RAM. They also use dual ported RAM so that two independent RAM fetches can go on simultaneously. I have this is my own machine. It is the main feature than speeds it up.
![]() |
and suggestions to improve this page to Roedy Green : | ||
| Canadian Mind Products | |||
| mindprod.com IP:[65.110.21.43] | |||
| Your face IP:[38.103.63.16] | The information on this page is for non-military use only. | ||
| You are visitor number 4,129. | Military use includes use by defence contractors. | ||
| You can get a fresh copy of this page from: | or possibly from your local J: drive (Java virtual drive/Mindprod website mirror) | ||
| http://mindprod.com/bgloss/waitstates.html | J:\mindprod\bgloss\waitstates.html | ||